Wafer-Scale Integration of Highly Uniform and Scalable MoS2 Transistors

4 years ago

Wafer-Scale Integration of Highly Uniform and Scalable MoS2 Transistors

Byoung Hun Lee, Kyu Hwan Lee, Kang Eun Lee, Jungheum Yun, Jucheol Park, Sung Kwan Lim, Dong-Ho Kim, Ah Ra Kim, Myung Gwan Hahm, Sun Young Choi, Byungjin Cho, Guoqing Zhao, Soo Cheol Kang, Yonghun Kim

Molybdenum disulfide with atomic-scale flatness has application potential in high-speed and low-power logic devices owing to its scalability and intrinsic high mobility. However, to realize viable technologies based on two-dimensional materials, techniques that enable their large-area growth with high quality and uniformity on wafer cale is a prerequisite. Here, we provide a route toward highly uniform growth of a wafer-scale, four-layered MoS₂ film on a 2 in. substrate via a sequential process consisting of the deposition of a molybdenum trioxide precursor film by sputtering followed by postsulfurization using a chemical vapor deposition process. Spatial spectroscopic analyses by Raman and PL mapping validated that the as-synthesized MoS₂ thin films exhibit high uniformity on a 2 in. sapphire substrate. The highly uniform MoS₂ layers allow a successful integration of devices based on ∼1200 MoS₂ transistor arrays with a yield of 95% because of their extreme homogeneity on Si wafers. Moreover, a pulse electrical measurement technique enabled investigation of the inherent physical properties of the atomically thin MoS₂ layers by minimizing the charge-trapping effect. Such a facile synthesis method can be possibly applied to other 2D transition metal dichalcogenides to ultimately realize the chip integration of device architectures with all 2D-layered building blocks.

Publisher URL: http://dx.doi.org/10.1021/acsami.7b10676

DOI: 10.1021/acsami.7b10676