3 years ago

Radix-10 decimal logarithm by direct selection for 6-input LUTs programmable devices

Martín Vázquez, Lucas Leiva, Gustavo Sutter

Publication date: Available online 9 November 2018

Source: Microprocessors and Microsystems

Author(s): Martín Vázquez, Lucas Leiva, Gustavo Sutter

Abstract

This paper proposes efficient fixed-point and floating-point implementations for radix-10 decimal logarithm on Xilinx FPGA devices. The technique is based on the digit-recurrence method, which supports the three decimal floating-point (DFP) types specified in the IEEE 754-2008 standard. The novelty of this proposal is that it avoids the implementation of redundant carry-save logic by direct selection (i.e. via scaling). The designs involve novel techniques based on efficient use of dedicated resources in the programmable devices. Implementations were made on Xilinx 7-series devices. For fixed-point logarithm, they are capable of operating up to 145 MHz for p=7, 124 MHz for p=16 and 108 MHz for p=34, and for DFP logarithm the operation frequency obtained was 123 MHz for p=7, 104 MHz for p=16 and 93 MHz for p=34. In contrast to other related works, the proposed architecture achieves better computation times and less occupation in area in terms of LUTs.

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